The present invention relates to a VC path switching method for monitoring bit errors in a VC (Virtual Container) path in a communication network and switching from a primary line to a backup line, and an apparatus using this method.
Conventionally, a redundant configuration which prevents communication interruption by arranging a primary line and a backup line and switches to the backup line when a fault has occurred has been used in the communication field to ensure the reliability.
A hitless protection switching method which generates neither missing of transmission data nor bit errors when switching to the backup line has been proposed.
In a VC path prescribed by SDH/SONET (Synchronous Digital Hierarchy/Synchronous Optical Network) (for example, “ITU-T G 707 Synchronous Digital Hierarchy (SDH)” and “Synchronous Optical Network (SONET) Transport Systems: Common Generic Criteria (A Module of TSGR, FR-440) Telcordia Technologies GR-253-CO E Issue 3, September 2000”), BIP-8 (Bit Interleaved Parity-8) is defined as a bit error monitoring method on a line, and a hitless protection switching method has using this BIP-8 arithmetic operation has been proposed and put to practical use.
Each VC path is provided with a POH (Path Overhead), and a B3 byte in the POH has a BIP-8 arithmetic operation result stored therein.
The STM-N/OC-3N frame format in SDH/SONET is shown in FIG. 1. In multiplexing to the STM-N/OC-3N in SDH/SONET, a standardized multiplexing unit called VC is used and VC-3/VC-4 is prescribed. Low speed information is multiplexed in the VC. The VC-3 frame format is shown in FIG. 2,
The VC-4 frame format is shown in FIG. 3.
Hereafter, the arithmetic operation method of BIP-8 will be described.
In the BIP-8, data to be monitored are assigned numbers 1 to 8 in the bit order from the head repeatedly and an even parity check is conducted on bit information pieces having the same number (the information pieces are called rail).
On the transmitter side, an even parity check is conducted on all bits in the VC path, and its result is stored in the B3 byte in the VC path to be transmitted next time.
On the receiver side, it is monitored whether there is a bit error in the VC path by conducting an even parity check on all received bits in the VC path and conducting comparison and collation with the value stored in the B3 byte in the VC path received next time.
The arithmetic operation result is stored in the next VC path, and this method is prescribed in “ITU-T G. 707 Synchronous Digital Hierarchy (SDH)” and “Synchronous Optical Network (SONET) Transport Systems: Common Generic Criteria (A Module of TSGR, FR-440) Telcordia Technologies GR-253-CORE Issue 3 (September 2000)”.